Research projects and grants

Ongoing projects

• PERP-5G 2023 → 2026


• Ph.D. grant with ISAE-SUPAERO 2023 → 2026


• CMA project on cybersecurity: 2023 → 2026


• Intercarnot project: "Digital twins for a safer and more secure industry of the future". 2022 → 2023


• C3S Chair: connected cars and cyber security. 2018 → 2022


• SysML-Sec, since 2012
Project with the Network and Security department of EURECOM.
SysML-Sec intends to bring security modeling capabilities to SysML.

Past projects

• SPARTA project: European project on the handling of both safety and security aspects when designing embedded systems. 2019 → 2022

• AQUAS - Aggregated Quality Assurance for Systems - H2020 ECSEL European project. 2017 → 2020

• Eurecom grant, Design for User Trust in an Ecosystem of Ubiquitous Internet of Things, Collaboration with EURECOM Digital Security department (Aurélien Francillon). 2017 → 2020

• Grant from the former student of Telecom ParisTech on the identification of unknown Android viruses with classification techniques.

• Alligator, since 2013
Project with Fortinet.
Alligator is a innovative classifier. It is used by Fortinet to identify Android malware (More than 20 real unknown malware/riskware have been identified). It is also used by the multimedia department of Eurecom for the classification of images.

• Drone4U, since 2011
Project with the multimedia department of EURECOM.
The objective of Drone4U is to propose an embedded system architecture for the autonomous navigation of cheap micro drones. Videos of autonomous flights are provided on the Drone4u website.

• VEDECOM grant (Secure architectures for protecting the behavior of autonomous vehicles). 2015 → 2018

• NETCOM, funded by the French government ("investissements d'avenir") Study and design of a LTE enodeB relay
.

• Security analysis of smart objects, funded by Labex UCN@Sophia, since 2014.
The main idea is to defined an environment so as to ease the security assessment of the hardware and software of smart objects.

• Alcatel-Lucent grant (Flexible and reconfigurable design for the 5th generation of the access system of embedded systems). 2015 → 2018

• Robustar & Pyramide, since 2011
Project co-funded by LIP6 and CNRS.
The objective of ROBUSTAR is the robustness analysis of applications executed on Systems-on-Chip and modeled at a high level of abstraction.

• EVITA (2008-2012)
Project co-funded by the European Commission within the Seventh Framework Programme for research and technological development.
The objective of EVITA is to design, verify, and prototype an architecture for automotive on-board networks where security-relevant components are protected against tampering and sensitive data are protected against compromise.

• Docea Power, since 2009
Definition of a UML profile for modeling and formally verifying power managers and power controllers. This involves the use of the TURTLE UML profile.

• Freescale (2007-2011)
Techniques for modeling and simulating system-on-chip at an early design phase. This involves the definition of UML metamodels to extend DIPLODOCUS modeling capabilities, and the definition and implementation of simulation techniques from UML diagrams.

• Texas Instruments (2004-2008)
Various topics adressed by this project were:
• Tools for the automatic synthesis of hardware architectures
• Tools for ASIP rapid development
• System-level design space exploration. It includes research on fast simulation techniques and requirement capture and verification


• Amigos (2006-2007)
Amigos stands for Analysis and Modeling of Operating Systems.

The AMIGOS project is a project sponsored by the Institut Telecom.
Due to the increasing complexity of communicating embedded systems, modeling techniques have evolved to take into account new constraints, both at hardware and application levels. Nevertheless, the important role operating systems now play in these applications is commonly underestimated at the modeling step. Their role is indeed often limited to a description of tasks they manage. In this project, we propose to integrate operating systems’ constraints into a UML-based modeling environment particularly customized for embedded system. This integration takes advantage of our past research work on modeling and formal validation techniques for embedded systems. Our short term goal is to define a new formal UML profile taking explicitly into account logical and temporal characteristics of operating systems. A long-term perspective of this project is to develop a software toolkit supporting this new profile, and to perform industrial experiments out of this new profile and toolkit.

Main results of the project were a UML profile name TURTLE-OS, as well as the definition of new techniques for the formal verification of infinite systems .


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