UMLEmb
UML
for
Embedded
Systems

General information


Verification



Learning System Verification

System verification intends to check that the requirements - expressed as properties - are satisfied in the system design.
  1. Open the slides on System verification.

  2. Watch the video on Verification and answer to the following questions when asked to pause the video.

  3. What is the main difference between simulation and formal verification?

  4. Can you cite and explain the three ways to express properties?



Practising with Verification


You are now ready to start with the labs!. For the labs, you first need to install TTool (if not already done), and to start with the Pressure Controller (lab #1).