Projects
ANR-SCAMA (Coordinator)
A gem5 co-simulation workflow to quantify instruction-wise leakage and validate countermeasures.
- gem5 trace alignment
- Per-opcode timing/power proxies
- CI & reproducible runs
ANR-PEPR-Security: ARSENE (Member)
Adversarial test generation for side-channel and transient-execution stress cases.
- Security-oriented coverage
- RTL assertions (SVA) hooks
- Verilator/cocotb harness
ANR-ARCHISEC (Coordinator)
Low-cost glitching and measurement setup for RISC-V soft cores and SoCs.
- Clock/Pwr/EM injection paths
- Automated test scenarios
- Mitigation benchmarking
IP Paris Concours (Coordinator)
Low-cost glitching and measurement setup for RISC-V soft cores and SoCs.
- Clock/Pwr/EM injection paths
- Automated test scenarios
- Mitigation benchmarking
ANR-PEPR-5G (Coordinator)
Low-cost glitching and measurement setup for RISC-V soft cores and SoCs.
- Clock/Pwr/EM injection paths
- Automated test scenarios
- Mitigation benchmarking
ANR-BPI-X7PQC (Member)
Low-cost glitching and measurement setup for RISC-V soft cores and SoCs.
- Clock/Pwr/EM injection paths
- Automated test scenarios
- Mitigation benchmarking
Horizon Europe- AI N2N (Member)
Low-cost glitching and measurement setup for RISC-V soft cores and SoCs.
- Clock/Pwr/EM injection paths
- Automated test scenarios
- Mitigation benchmarking
EuroTech Mobility for Building MSCA Doctoral Network
Low-cost glitching and measurement setup for RISC-V soft cores and SoCs.
- Clock/Pwr/EM injection paths
- Automated test scenarios
- Mitigation benchmarking
