Projects
ANR-SCAMA (Coordinator)
A gem5 co-simulation workflow to quantify instruction-wise leakage and validate countermeasures.
- Security failures in computing systems are a major concern.
- Vulnerabilities can hide across the stack—apps, OS, hypervisor, microarchitecture, hardware, storage, and interfaces.
- Attacks like Spectre, Meltdown, and ZombieLoad show hardware can leak sensitive data via side effects.
- Undocumented architectural features enable new, yet-undescribed side-channel attacks.
- This proposal targets the HW/SW intersection to enable secure-by-design computing.
- Goal: balance strong security with the hard-won performance benefits of modern architectures.
ANR-PEPR-Security: ARSENE (Member)
ARSENE Project – Part of the PEPR Cybersecurity program, ARSENE develops sovereign solutions for hardware and software security.
- Focus on securing processors and peripherals (memories, hazard generators, etc.).
- Works across multiple abstraction levels: hardware design, compilers, operating systems, and more.
- Aims to accelerate coordinated R&D of sovereign and industrializable security solutions.
- Implements ASIC and FPGA demonstrators to test and validate developed security components.
ANR-ARCHISEC (Coordinator)
Objectives – The project focuses on analyzing processor vulnerabilities and developing secure architectures.
- Identify model-level architectural vulnerabilities in ARM and RISC-V processors and anticipate related attacks.
- Use custom OS ("BareMetal") or Linux to study different security modes for the same class of issues.
- Study heterogeneous SoCs with multiple cores, GPUs, FPGA circuits, and cache coherence management units, using SystemC TLM II for FPGA modeling in GEM5.
- Integrate Trusted Execution Environments (TEEs) into GEM5, focusing on open-source OPTEE based on ARM TrustZone technology.
ANR-PEPR-5G (Member)
Low-cost glitching and measurement setup for RISC-V soft cores and SoCs.
- Clock/Pwr/EM injection paths
- Automated test scenarios
- Mitigation benchmarking
ANR-BPI-X7PQC (Member)
Transitioning Embedded Systems to Post-Quantum Cryptography – Secure-IC’s approach to enabling post-quantum security in constrained embedded systems.
- Defines embedded systems as electronics-software-communication devices with strict real-time, speed, and reliability constraints; highlighted as a French area of excellence.
- Analyses the risks of migrating to PQC, stressing that all system components—not just firmware verification—must support PQC.
- Highlights Secure-IC's CAVP A6046 hardware certificate and PQC-ready Securyzr platform; CMVP certification expected in early 2025.
Horizon Europe- AI N2N (Member)
European AI Strategic Autonomy – Reinforcing Europe’s leadership in AI through collaboration and excellence networks.
- Ensure European open strategic autonomy in critical technologies like AI with strong socio-economic impact.
- Build on Europe’s assets – world-class researchers and leading research centres – while reducing fragmentation.
- Strengthen excellence, networking, multidisciplinarity, and academia-industry synergies in AI across Europe.
- Continue the Horizon 2020 initiative by expanding and reinforcing a vibrant European AI scientific community.
