Contact :

maria.mushtaq@telecom-paris.fr

Telecom Paris, COMELEC Department

19 place Marguerite Perey, 91120 Palaiseau

Office 3.B18

Phone: 01 75 31 40 05

Academic Qualifications:

• PhD: Lab-STICC, Universite de Bretagne Sud, Lorient, France.

Research Interests:

• Embedded system security
• Microarchitectural security and Artificial Intelligence
• Side Channel Detection and Mitigations

Publications:

• My list of publications can be found on Google Scholar.
• My activities of research can be found on LinkedIn.
• ORICID : 0000 0003 0046 2582.

Scientific Involvement:

• Exploration of Systematic Vulnerability Assessment of Side-Channel Attacks, HiPEAC Collaboration Grant, Computer Architecture and Security Laboratory (CASLAB), Yale University, USA, 2021.
• Panelist, Debate: Future directions for secure hardware/software interfaces, SILM Workshop, Euro Security & Privacy, Digital event, France, 2021.
• Microarchitectural Vulnerability Assessment and Mitigations, invited talk, presented on 19th March 2021, CIDRE, IRISA, Rennes, France. Talk available here
• What are Transient Execution Attacks - Are We Secure Today? ADAC Days, 22nd April 2021, LIRMM, Montpellier, France.
• The State of Information Security is Dark & Full of Terror, invited talk, presented at ECLab, Information Technology University, Pakistan, 11th February 2021.
• Guest Editor at Journal of Applied Sciences, Special Issue: Side Channel Attacks in Embedded Systems, 2021.
• Program Committee Member, European Test Symposium (ETS), 2020-2021.
• Side-channel Information Leakage: A Threat to Modern Computing Paradigm, Invited talk, 30th May 2021, Global Forum on Innovations in Science and Technology , Minhaj University, Lahore, Pakistan.
• Machine Learning as a Security Approach: Detection of Side and Covert Channel Attacks., Presented at GDR SoC2 and Sécurité Informatique, Lyon, France, 26th November 2020. Slides here.
• Microarchitectural Vulnerability Assessment and Mitigations, Keynote Talk at IEEE-CASS (Rio do sul chapter), 20th Nov 2020. Talk Available Here
• Special Track SCADD: Side Channel Attacks, Detection & Defenses, The Fifth International Conference on Cyber Technologies and Cyber Systems, Nice, France, 2020.
• Side-Channel Attacks, Detection and Mitigation: An Understanding to Microarchitectural Security, invited talk, presented at Laboratory TIMA, 5th Dec 2020.
• An Understanding to Microarchitectural Security and Future Perspectives, invited talk, presented at Laboratory VERIMAG, Grenoble, 11th Dec 2020.
• Threat of Side-channels and Secure-by-Design Computing, invited talk, presented at LiP6, Sorbonne University, Paris, 17th Dec 2020.
• Side-channel Information Leakage –Attacks, Detection & Mitigation, invited talk, presented at LIRMM, Montpellier, 22nd March 2019.
• Machine Learning for Security: The Case of Side-channel Attack Detection at Run-time, Presented at Journée thématique Sécurité, fiabilité et test des SoC2: challenges et opportunités dans l’ère de l’Intelligence Artificielle, Paris, France, 2019.
• Cache-Based Side Channel Intrusion Detection using Hardware Perfor-mance Counters,M. Mushtaq, A. Akram, M. K. Bhatti, V. Lapotre, G. Gogniat, Presented at 16th International Workshops on Cryptographic Architectures Embedded in Logic Devices (CryptArchi), 2018. Link Here.
• Cache based Side Channels–Attacks & Detection Approaches, Workshop on Cyber Security, Université de Bretagne Sud, Lorient, France, 2017.