Illustration: research concept

Maria Mushtaq

Safe and Secure Hardware (SSH) Team

COMELEC Department Telecom-Paris

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About me

Dr Maria Mushtaq is an Associate Professor in the Safe and Secure Hardware (SSH) Team at COMELEC Department, Telecom Paris, France. She earned her PhD from Université Bretagne Sud, France (2016-2019), focusing on "Software-based Detection and Mitigation of Microarchitectural Attacks on Intel's x86 Architecture", followed by a prestigious CNRS Excellence PostDoc position at LIRMM, Université de Montpellier (2019-2021). Her research interests lie in Microarchitectural security, Side-channel attacks & mitigations and AI-driven vulnerability assessment mechanisms for embedded systems.

Research Areas

We organize our work across the following themes.

Microarchitectural Attacks & Defenses

Developing and validating secure software modules, such as OS-level security primitives that protect against hardware vulnerabilities

Cryptanalysis & Software Security Components

Cache/branch leaks, transient execution, timing channels, and robust countermeasures.

  • x86
  • RISC-V
  • ARM
#Microarchitectural Attacks #Side-Channel Attacks
Virtual Platforms for Security Assesments

Virtual Platforms for Security Assessments Virtual prototyping to test security vulnerabilities without physical hardware.

  • Emulate processors and SoCs for safe, repeatable security testing.
  • Analyze microarchitectural flaws like speculation and cache side-channels.
  • Test OS-level defenses and runtime mitigation strategies in virtual setups.
#Hardware-Software Co-Simulation #SoC Emulation
AI based Hardware Security

AI-based Hardware Security – Leveraging artificial intelligence techniques to detect, predict, and mitigate hardware vulnerabilities.

  • Use machine learning models to identify anomalies, side-channel leaks
  • Apply AI for proactive threat detection—anticipating faults, attacks.
  • Enable adaptive defense strategies that continuously learn and evolve to counter emerging microarchitectural or hardware-level attacks.
#AI for Hardware Security #Machine Learning in Security

People

Research: Hardware security, microarchitectural leakage, formal verification, and secure SoC design.

Group Leader
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Dr. Maria Mushtaq

Associate Professor, COMELEC

Research: Hardware Security, Embedded Systems, ML, Side Channels Attacks at Telecom Paris.

Current PhD Students
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Muhammad AWAIS
PhD Student
Working on gem5 assisted hardaware accelorators for Side-channel attack detection.
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Nathanael SIMON
PhD Student
Working on Machine Learning Based Side-channel attack detection, Mainly focusing Reinforcement Learning.
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Mahreen Khan
PhD Student
Working of Hardware Performance Countermeasures for Side channels Attacks analysis
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Muhammad HASSAN
Working of Attacks Analysis and their mitigations using Simulation tools, mainly gem5
Former PhD Supervisons
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Loïc FRANCE
PhD Université de Montpellier
Study and evaluation of the impact of emerging technologies on memory vulnerabilities in embedded systems , PhD in Embedded Security, 2019-2022.
Montpellier
Currently Doing Post Doc from LIRMM.
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Natasha Alkhatib
Bachelors Project-IP Paris
Intrusion detection using Machine Learning for connected cars, PhD in Cybersecurity, 2019-2022.
, Telecom Paris
Currently Automotive Cybersecurity Leader at SYMBIO.
Internship Supervisons
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Kolic Bogdana
Bachelors Project-IP Paris
Detection of Rowhammer Attack using HPCs and Machine Learning.
Telecom Paris
Currently Doing Masters from EPFL ETH.
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Samy Rida
Masters Project
Implementation of countermeasure techniques for cache-based timing side-channel attacks in multi- & many-core systems (3 Months).
Université Bretagne Sud, Lorient, France
Consultant in Cybersecurity SERMA SAFETY + Security
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Jeremy Bricq
Masters Project
Implementation of cache-based timing side-Channel attacks in multi- & many-core systems (3 Months).
Université Libre de Bruxelles, Belgium

Talks

Highlights

Latest Publications

Selected recent papers. For a full list, see Google Scholar.

  1. Decoding Attack Behaviors by Analyzing Patterns in Instruction-Based Attacks using gem5
    Muhammad Awais, Maria Mushtaq, Lirida Naviner, Florent Bruguier RSP, 2024
    PDF BibTeX 
                                @INPROCEEDINGS{10871078,
                  author={Awais, Muhammad and Mushtaq, Maria and Naviner, Lirida and Bruguier, Florent and Yahya, Jawad Haj and Benoit, Pascal},
                  booktitle={2024 International Workshop on Rapid System Prototyping (RSP)}, 
                  title={Decoding Attack Behaviors by Analyzing Patterns in Instruction-Based Attacks using gem5}, 
                  year={2024},
                  volume={},
                  number={},
                  pages={1-6},
                  keywords={Reduced instruction set computing;Embedded systems;Hardware security;Conferences;Vectors;Pattern recognition;Decoding;Reliability;Optimization;Hardware Security;Embedded Systems;Hardware Attacks;Attacks Simulation;Attacks Patterns},
                  doi={10.1109/RSP64122.2024.10871078}}
    2025
  2. Evict+ Spec+ Time on RISC-V: Gem5-Based Implementation and Microarchitectural Analysis
    Mahreen Khan, Maria Mushtaq, Renaud Pacalet, Ludovic Apvrille 28th Euromicro Conference Series on Digital System Design (DSD), 2025
    PDF 
                            @INPROCEEDINGS{10871078,
              author={Awais, Muhammad and Mushtaq, Maria and Naviner, Lirida and Bruguier, Florent and Yahya, Jawad Haj and Benoit, Pascal},
              booktitle={2024 International Workshop on Rapid System Prototyping (RSP)}, 
              title={Decoding Attack Behaviors by Analyzing Patterns in Instruction-Based Attacks using gem5}, 
              year={2024},
              volume={},
              number={},
              pages={1-6},
              keywords={Reduced instruction set computing;Embedded systems;Hardware security;Conferences;Vectors;Pattern recognition;Decoding;Reliability;Optimization;Hardware Security;Embedded Systems;Hardware Attacks;Attacks Simulation;Attacks Patterns},
              doi={10.1109/RSP64122.2024.10871078}}
    2025
  3. SpectreShield: Design and Analysis of Spectre Countermeasures on RISC-V Using gem5
    Mahreen Khan, Maria Mushtaq, Renaud Pacalet, Ludovic Apvrille IEEE International Conference on Cybersecurity and Resilience (IEEE CSR), 2025
    PDF 
                            @INPROCEEDINGS{10871078,
              author={Awais, Muhammad and Mushtaq, Maria and Naviner, Lirida and Bruguier, Florent and Yahya, Jawad Haj and Benoit, Pascal},
              booktitle={2024 International Workshop on Rapid System Prototyping (RSP)}, 
              title={Decoding Attack Behaviors by Analyzing Patterns in Instruction-Based Attacks using gem5}, 
              year={2024},
              volume={},
              number={},
              pages={1-6},
              keywords={Reduced instruction set computing;Embedded systems;Hardware security;Conferences;Vectors;Pattern recognition;Decoding;Reliability;Optimization;Hardware Security;Embedded Systems;Hardware Attacks;Attacks Simulation;Attacks Patterns},
              doi={10.1109/RSP64122.2024.10871078}}
    2025
  4. Assessing the Vulnerabilities of RISC-V using the gem5 Simulator (Access-Retired)
    Mahreen Khan, Maria Mushtaq, Renaud Pacalet, Ludovic Apvrille Twenty-first edition of the HiPEAC summer school (ACACES 2025), 2025
    PDF 
                            @INPROCEEDINGS{10871078,
              author={Awais, Muhammad and Mushtaq, Maria and Naviner, Lirida and Bruguier, Florent and Yahya, Jawad Haj and Benoit, Pascal},
              booktitle={2024 International Workshop on Rapid System Prototyping (RSP)}, 
              title={Decoding Attack Behaviors by Analyzing Patterns in Instruction-Based Attacks using gem5}, 
              year={2024},
              volume={},
              number={},
              pages={1-6},
              keywords={Reduced instruction set computing;Embedded systems;Hardware security;Conferences;Vectors;Pattern recognition;Decoding;Reliability;Optimization;Hardware Security;Embedded Systems;Hardware Attacks;Attacks Simulation;Attacks Patterns},
              doi={10.1109/RSP64122.2024.10871078}}
    2025
  5. Side-Channel Attack Detection using gem5 and Machine Learning: A Case Study on Fault-based Attacks in RISC-V
    Mahreen Khan, Maria Mushtaq, Renaud Pacalet, Ludovic Apvrille The 31st IEEE International Symposium on On-Line Testing and Robust System Design, 2025
    PDF 
                            @INPROCEEDINGS{10871078,
              author={Awais, Muhammad and Mushtaq, Maria and Naviner, Lirida and Bruguier, Florent and Yahya, Jawad Haj and Benoit, Pascal},
              booktitle={2024 International Workshop on Rapid System Prototyping (RSP)}, 
              title={Decoding Attack Behaviors by Analyzing Patterns in Instruction-Based Attacks using gem5}, 
              year={2024},
              volume={},
              number={},
              pages={1-6},
              keywords={Reduced instruction set computing;Embedded systems;Hardware security;Conferences;Vectors;Pattern recognition;Decoding;Reliability;Optimization;Hardware Security;Embedded Systems;Hardware Attacks;Attacks Simulation;Attacks Patterns},
              doi={10.1109/RSP64122.2024.10871078}}
    2025
  6. Prototyping Custom Hardware Performance Counters in gem5 Simulator: A Framework for RISC-V Side-Channel Attack Assessment
    Mahreen Khan, Maria Mushtaq, Renaud Pacalet, Ludovic Apvrille 25th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS), 2025
    PDF 
                            @INPROCEEDINGS{10871078,
              author={Awais, Muhammad and Mushtaq, Maria and Naviner, Lirida and Bruguier, Florent and Yahya, Jawad Haj and Benoit, Pascal},
              booktitle={2024 International Workshop on Rapid System Prototyping (RSP)}, 
              title={Decoding Attack Behaviors by Analyzing Patterns in Instruction-Based Attacks using gem5}, 
              year={2024},
              volume={},
              number={},
              pages={1-6},
              keywords={Reduced instruction set computing;Embedded systems;Hardware security;Conferences;Vectors;Pattern recognition;Decoding;Reliability;Optimization;Hardware Security;Embedded Systems;Hardware Attacks;Attacks Simulation;Attacks Patterns},
              doi={10.1109/RSP64122.2024.10871078}}
    2025
  7. PEvaluating KASLR Break on RISC-V using gem5: Microarchitectural Side-Channel Analysis of Page-Table Walks
    Mahreen Khan, Maria Mushtaq, Renaud Pacalet, Ludovic Apvrille European Interdisciplinary Cybersecurity Conference, 2025
    PDF 
                            @INPROCEEDINGS{10871078,
              author={Awais, Muhammad and Mushtaq, Maria and Naviner, Lirida and Bruguier, Florent and Yahya, Jawad Haj and Benoit, Pascal},
              booktitle={2024 International Workshop on Rapid System Prototyping (RSP)}, 
              title={Decoding Attack Behaviors by Analyzing Patterns in Instruction-Based Attacks using gem5}, 
              year={2024},
              volume={},
              number={},
              pages={1-6},
              keywords={Reduced instruction set computing;Embedded systems;Hardware security;Conferences;Vectors;Pattern recognition;Decoding;Reliability;Optimization;Hardware Security;Embedded Systems;Hardware Attacks;Attacks Simulation;Attacks Patterns},
              doi={10.1109/RSP64122.2024.10871078}}
    2025
  8. Assessing Security RISC: Analyzing Flush+ Fault Attack on RISC-V using gem5 Simulator
    Mahreen Khan, Maria Mushtaq, Renaud Pacalet, Ludovic Apvrille International Conference on Security and Cryptography (SECRYPT), 2025
    PDF 
                            @INPROCEEDINGS{10871078,
              author={Awais, Muhammad and Mushtaq, Maria and Naviner, Lirida and Bruguier, Florent and Yahya, Jawad Haj and Benoit, Pascal},
              booktitle={2024 International Workshop on Rapid System Prototyping (RSP)}, 
              title={Decoding Attack Behaviors by Analyzing Patterns in Instruction-Based Attacks using gem5}, 
              year={2024},
              volume={},
              number={},
              pages={1-6},
              keywords={Reduced instruction set computing;Embedded systems;Hardware security;Conferences;Vectors;Pattern recognition;Decoding;Reliability;Optimization;Hardware Security;Embedded Systems;Hardware Attacks;Attacks Simulation;Attacks Patterns},
              doi={10.1109/RSP64122.2024.10871078}}
    2025
  9. Vulnerability Assessment for the Rowhammer Attack Using Hardware Performance Counters and Machine Learning
    Bogdana Kolić, Maria MushtaqInternational Workshop on Security Proofs for Embedded Systems (PROOFS 2024), 2024
    PDF 
                            @INPROCEEDINGS{10871078,
              author={Awais, Muhammad and Mushtaq, Maria and Naviner, Lirida and Bruguier, Florent and Yahya, Jawad Haj and Benoit, Pascal},
              booktitle={2024 International Workshop on Rapid System Prototyping (RSP)}, 
              title={Decoding Attack Behaviors by Analyzing Patterns in Instruction-Based Attacks using gem5}, 
              year={2024},
              volume={},
              number={},
              pages={1-6},
              keywords={Reduced instruction set computing;Embedded systems;Hardware security;Conferences;Vectors;Pattern recognition;Decoding;Reliability;Optimization;Hardware Security;Embedded Systems;Hardware Attacks;Attacks Simulation;Attacks Patterns},
              doi={10.1109/RSP64122.2024.10871078}}
    2024
  10. Reducing the Silicon Area Overhead of Counter-Based Rowhammer Mitigations
    Loïc France, Florent Bruguier, David Novo, Maria Mushtaq, Pascal BenoitEEE Computer Architecture Letters, 2023
    PDF 
                            @INPROCEEDINGS{10871078,
              author={Awais, Muhammad and Mushtaq, Maria and Naviner, Lirida and Bruguier, Florent and Yahya, Jawad Haj and Benoit, Pascal},
              booktitle={2024 International Workshop on Rapid System Prototyping (RSP)}, 
              title={Decoding Attack Behaviors by Analyzing Patterns in Instruction-Based Attacks using gem5}, 
              year={2024},
              volume={},
              number={},
              pages={1-6},
              keywords={Reduced instruction set computing;Embedded systems;Hardware security;Conferences;Vectors;Pattern recognition;Decoding;Reliability;Optimization;Hardware Security;Embedded Systems;Hardware Attacks;Attacks Simulation;Attacks Patterns},
              doi={10.1109/RSP64122.2024.10871078}}
    2023

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Contact

Reach out for collaborations, positions, or media.

Maria MUSHTAQ
Associate Professor
3B, Place Marguerite Perey
COMELEC, Telecom Paris
Cs 20031
Palaiseau, France

Email

@Maria_Mushtaq_

Maria Mushtaq

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