This is a short guide to start a design on a DE1-SoC board.

The FPGA dev. Board

The DE1-SoC Board is an FPGA board designed by Terasic and Altera/Intel for teaching and student projects.

Main caracteristics

• The FPGA: Cyclone V SoC 5CSEMA5F31C6 Device
  • 85K Programmable Logic Elements
  • 4,450 Kbits embedded memory
• Switches, Buttons and Indicators connected to the FPGA
  • 10 switches
  • 10 User LEDs
  • Six 7-segment displays
• Other I/O
  • Clock generators
  • 24-bit VGA DAC
  • 24-bit CODEC, Line-in, line-out, and microphone-in jacks
  • Two 40-pin Expansion Headers
  • …

The complete User Manual can be downloaded HERE

Download the project

1. Download the project archive HERE
2. In a terminal, extract the project:

tar xzvf de1-soc.tar.gz

Lunch Quartus

• In a terminal:

quartus &

• From the Desktop luncher

Open the project

From Quartus GUI, select Open Project from the File menu

Then selected the project file (*.qpf) from the extracted folder.

The top level module

The top level module is called fpga and can be edited by selecting the corresponding file in the project navigator.

The sdc file contains the clock constraints.

Build the project and program the FPGA

• To run the complete flow, click on the run button .

This will all the necessary steps (synthesis, map, place & route, bit stream generation). This will also trigger a timing analysis to verify that the timing constraints are respected.

Programming the FPGA

Make sure that the board is connected to the power supply and the power switch is ON. The USB programming cable must also be connected to your PC/workstation.

• Then, to program the FPGA, click on the programmer button

This should open the following window:

Clicking on the start button should program the FPGA.

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