A 128K embedded MRAM test chip. No it is not STT (Spin Torque Transfer) but thermally assisted (TAS MRAM) like in the old days. MRAM hangs on top leaving space to design logic below. CMOS transistors are 130nm and MTJs are 120nm.

Sadly it didn’t work because of some weird problem during MTJ deposition on top.

Details here:: Design of embedded MRAM macros for memory-in-logic applications